Temperature-Aware Performance and Power Modeling

Power has become the primary design constraint for systems ranging from server computers to handhelds. As semiconductor technology scales down, leakage power becomes significant. Leakage power is exponentially dependent on temperature. Therefore, future design studies call for temperature-aware power modeling and coupled power and thermal management due to the temperature dependence of leakage power. Additionally, temperature-aware performance modeling must be carried out with coupled power and thermal management because circuit delay also depends on temperature. In this paper we study microarchitecture-level temperature-aware power and performance modeling. We present a leakage power model with temperature and voltage scaling. We show that leakage energy and total energy vary 38% and 24% for temperatures between 65C and 110C, respectively. We study thermal runaway induced by the interdependence between temperature and leakage power. We also demonstrate that without temperature-aware modeling, underestimation of leakage power may lead to the failure of thermal controls, and overestimation of leakage power may result in excessive performance penalties of up to 5.24%. All of these studies underscore the necessity of temperature-aware power modeling. Furthermore, we study optimal voltage scaling for best performance with dynamic power and thermal management under different packaging options. We show that dynamic power and thermal management allows designs targeting at the common-case thermal scenario among benchmarks and improves performance by 6.59% compared to designs targeting at the worst-case thermal scenario without dynamic power and thermal management. Additionally, the optimal Vdd for the best performance may not be the largest Vdd allowed by the given packaging platform, and that advanced cooling techniques can improve throughput significantly.